1. Field of the Invention
The present invention relates to a package board and a semiconductor device using the package board.
2. Description of the Related Art
In recent years, a demand on a small-size, thin, high-speed semiconductor device is increasing. In order to meet such a demand, a flip-chip connection technique is introduced in which a semiconductor chip is directly mounted on a package board in a facedown manner. According to a conventional wire bonding technique, a semiconductor chip has been connected to a gold bonding wire. On the other hand, according to the flip-chip connection technique, gold stud bumps and the like are formed on electrode pads of the semiconductor chip, and thereby the flip-chip connection between the semiconductor chip and the package board is achieved. The flip-chip connection can be achieved at relatively low cost.
There are several methods for electrically connecting a semiconductor chip and a package board. A method described in Japanese Laid Open Patent Application JP-A-Heisei 11-186322 is known as a method with comparatively high connection reliability. According to the method, solder coating is performed for the package board in advance, and the semiconductor chip and the package board are electrically connected with each other by applying heat, load and so on. Here, it is necessary to stabilize the amount of solder supplied to the connection region and behavior of the solder at the time of establishing the connection. Therefore, with regard to the package board used in the above-mentioned method, the solder coating is limited to interconnections near the connection region, and the region other than the solder coating region is coated with insulating resin and the like.
Hereinafter, an example of the conventional flip-chip connection technique is explained with reference to FIGS. 1 and 2. FIG. 1 is a plan view schematically illustrating a semiconductor device according to the conventional technique. FIG. 2 schematically illustrates a cross-section along a line Y-Y′ in FIG. 1.
In a semiconductor device 50, an interconnection 4 is provided on a board 2, and a bump 10 is formed on an electrode pad (not shown) of a semiconductor chip 12. An insulating film including first insulating layer 6 and second insulating layer 8 are formed on the board 2. Solder 14 is provided in a connection region. In the connection region, the interconnection 4 and the bump 10 are connected to each other through the solder 14. As shown in FIGS. 1 and 2, a package board 2 has a first insulating layer 6, a second insulating layer 8, and an opening section between the first insulating layer 6 and the second insulating layer 8. The opening section is larger than the connection region. The second insulating layer 8 covers all over an internal region that is on a side of the opening section. A portion of the interconnection 4 that is covered with neither the first insulating layer 6 nor the second insulating layer 8 is exposed, and the exposed portion of the interconnection 4 can be coated with the solder 14 according to the semiconductor device 50. In the solder-coated portion, the connection to the bump 10 formed on the electrode pad (not shown) of the semiconductor chip 12 is achieved. The semiconductor chip 12 is connected in a facedown manner to the solder-coated portion by appropriately applying heat, load, supersonic wave and so forth. It should be noted in FIG. 1 that a dotted line 15 represents a region in which the semiconductor chip 12 is provided.
In order to prevent stress concentration to the connection portion or rupture of the connection portion due to difference of rate of thermal expansion between the semiconductor chip 12 and the package board 1, the space between the semiconductor chip 12 and the package board 1 may be filled with sealing resin 18 as stress relaxation resin material as shown in FIG. 2. Usually, the stress relaxation resin material 18 is supplied in the form of a liquid. In many cases, the stress relaxation resin material 18 is supplied after the semiconductor chip 12 and the package board 1 are connected with each other.
For example, the liquid stress relaxation resin material 18 is supplied in the following way.
A thin tube called “needle” is attached to a tip of a cylindrical container called “syringe”. A tip of the needle is brought near the semiconductor chip 12 that is connected to the package board 1. Subsequently, the liquid stress relaxation resin material is discharged from the tip of the needle by applying pressure and so forth. The liquid stress relaxation resin material discharged from the tip of the needle spreads between the semiconductor chip 12 and the package board 1 due to the capillary phenomenon.